The invention relates to a D-type flipflop which can be realized in an ECL or CML technique, comprising a first pair of transistors constituting a first semi-flipflop, supplying a first logic signal at a first couple of logic connections, a second pair of transistors constituting a second semi-flipflop, supplying a second logic signal at a second couple of logic connections, the two pairs being coupled together for jointly constituting a complete flipflop, the second couple of logic connections constituting an internal output of the logic signal of the flipflop in a symmetrical mode.
The invention also relates to a charge-pump circuit and to an integrated circuit.
The acronyms ECL and CML stand for "Emitter Coupled Logic" and "Current Mode Logic", respectively. When a "pair of transistors" is mentioned, always two transistors are concerned, having their emitters jointly connected to a current source.
When a flipflop is used in a complex circuit, it is sometimes difficult to verify the operation of this circuit in all possible cases.